DRAM that implements parity checking has one additional bit for every 8 bits of data. This extra bit allows the system to verify the data format using one of two parity protocols - odd parity or even parity. Parity is achieved when the total number of 1 bits in a byte adds up to either an even or odd number, depending on the parity system that is used. In a system using even parity, the extra bit is used as necessary to make the total number of 1 bits an even number. In an odd parity system, the extra bit is used to create an odd number total of 1 bits. When a byte including its parity bit fails to have the appropriate number of bits, a parity error occurs. A parity error can be the first sign of a host of problems, ranging from one-time anomalies to faulty memory. A parity system only reports an error - it cannot rectify an error.
Non-parity memory systems don't perform data integrity checks. You can't use non-parity memory in a parity system but you can use parity memory in a non-parity system. Doing so generates a parity error as soon as the system boots up. You can turn off parity checking on some systems in the BIOS setup.
Error Correction Code
ECC is a data integrity method that is used in place of parity memory on many systems. The difference between ECC memory and parity memory is that ECC can not only detect errors like parity memory, but it can also correct errors to a point. ECC memory can detect up to a 4-bit memory error, but it can only correct 1-bit errors.